DEPARTMENT OF COMMUNICATION AND NETWORKING
Communications and Networking is designed to equip students with a detailed knowledge of software engineering and its application in the field of communications systems. It also produces graduates with in-depth skills in the computer and telecommunications areas. Prospective careers for such graduates include the design of computer networking hardware and software, and the planning, research, design and development of future telecommunications systems.
| S.No | Name | Designation | Experience | Qualification | Nature of Appointment |
|---|---|---|---|---|---|
| 1 | Dr. Isaac Sajan R | Professor & Vice Principal | 15 years | B.E., M.E., Ph.D., | Regular |
| 2 | Dr. Kavitha M R | Professor & Head | 12 Years 6 Months | B.E., M.E., Ph.D., | Regular |
| 3. | Mr. Arul Raj N K | Assistant Professor | 9 Years 8 Months | B.E., M.E.,(Ph.D)., | Regular |
ELECTRONICS SYSTEM DESIGN LABORATORY-I
The objectives of this lab are to design a system using PIC,MS P430, 51 Microcontroller and 16-bit Microprocessor 8086 to implement an Adaptive filters and multistage multirate system in DSP processor, to analyze the asynchronous and clocked synchronous sequential circuits, to design sensors and to analyze the real time signal processing systems and to know about different interfaces. On completing the lab, students can able to design, implement and analyze any electronic system using PIC,MSP430, 51 Microcontroller, 16 bit Microprocessor, DSP processor and simulation tools.
ELECTRONICS SYSTEM DESIGN LABORATORY-II
The objective of the electronics system design laboratory is to test the RTOS environment and system programming, to design the wireless network using embedded systems, to implement the ARM with FPGA, to design and Implement ALU in FPGA using VHDL and Verilog, to Model the Sequential Digital system using Verilog and VHDL, to verify the flash controller programming, to design a system using ASIC and to design, simulate and analyze signal integrity. Over the Completion of the Electronics System Design Lab II the students will have the capability to test the RTOS environment and system design program and design and test the ARM and FPGA Kit using VHDL and Verilog programs. The students are also capable to verify flash controller using various programs and to design a system using ASIC and signal Integrity.
| S.No | Name of the Student | CGPA | Rank | PG/UG | Year |
|---|---|---|---|---|---|
| 1 | Ashwini | 9.17 | 1 | PG | 2017 |
| 2 | Stemyshalan | 0 | 6 | PG | 2016 |
| 3 | Ebala R | 0 | 6 | PG | 2015 |
| 4 | Jasmine Sherly S | 0 | 9 | PG | 2015 |
| 5 | AngelinJeba D | 0 | 11 | PG | 2015 |
VISION
To become a creative learning environment to the students for valuable resources to serve Nation, Industry and Society through excellence in technical education and research.
MISSION
- To educate the students with the state of art technologies to meet the growing challenges of the industry.
- Foster culture of innovation and research through constant interaction with research organizations and industry to address present and future problems.
- To equip the students with strong foundations to enable them for continuing education
- Collaborate with researchers from other disciplines to address societal grand challenge problems